High density electronic devices have been designed and fabricated to satisfy the increasing demand for high levels of functionality in small packages. Products that may be made from the modules include memory, digital logic, processing devices, and analog Radio Frequency (RF) circuits, sensors, etc. Typical integration of high density electronic devices achieves an integration density that is many times greater than, for example, surface mount technology (“SMT”), and has a lower set-up cost and development time.
Conventional fabrication techniques for these high density electronic devices include, for example, forming die(s) (or other electronic modules), forming through substrate vias (TSVs), positioning the die(s) (or other electronic modules) and the TSVs on a mounting surface, encapsulating the die(s) and the TSVs in a mold compound, and forming one or more electrical layers along surfaces of the mold compound (e.g., top-side electrical layers, bottom-side electrical layers, etc.). Importantly, the TSVs provide electrical interconnection between such electrical layers.
For certain applications, large size electronic modules are required (e.g., integrated circuits, micro-electromechanical (MEMs) sensors, and the like). For these applications, the relatively large size electronic modules prove limiting to the overall integration density. Accordingly, a need remains for fabrication techniques that improve space utilization for high density electronic modules, particularly adapted for wafer based modules.